Methods for fabricating semiconductor devices with charge storage patterns
US8232170B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 21, 2011 |
| Grant date | Jul 31, 2012 |
| Priority date | — |
| Expiry date | Mar 26, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/30
Abstract
Provided are methods for fabricating semiconductor devices. A method may include forming a device isolation layer to define active regions on a semiconductor substrate. The active regions may protrude above an upper surface of the device isolation layer. The method may also include forming tunnel insulating layers on upper and side surfaces of corresponding ones of the active regions. The method may further include forming charge storage patterns on corresponding ones of the tunnel insulating layers. The charge storage patterns may be separated from each other. The method may also include forming a blocking insulating layer on the charge storage patterns and the device isolation layer. The method may further include forming a gate electrode on the blocking insulating layer. The blocking insulating layer may cover the device isolation layer such that the gate electrode is precluded from contact with the device isolation layer and the tunnel insulating layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.