Transient voltage suppressors
US8232601B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 18, 2012 |
| Grant date | Jul 31, 2012 |
| Priority date | — |
| Expiry date | May 18, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/711
Abstract
The present invention relates a transient voltage suppressor (TVS) for directional ESD protection. The TVS includes: a conductivity type substrate; a first type lightly doped region, having a first type heavily doped region arranged therein; a second type lightly doped region, having a second type heavily doped region and a third type heavily doped region arranged therein; a third type lightly doped region, having a fourth type heavily doped region arranged therein; a plurality of closed isolation trenches, arranged on the conductivity type substrate, wherein at least one of the plurality of closed isolation trenches is neighbored one of the type lightly doped regions; and a first pin. Accordingly, the TVS of present invention may adaptively provide effective ESD protection under positive and negative ESD stresses, improve the efficiency of ESD protection within the limited layout area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.