Method and apparatus for resolving clock management issues in emulation involving both interpreted and translated code
US8234514B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 12, 2010 |
| Grant date | Jul 31, 2012 |
| Priority date | — |
| Expiry date | Oct 29, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and systems for resolving clock management issues in emulation of a target system on a host system are disclosed. A first set of code instructions of a target program is emulated to generate a first set of emulated instructions that emulate a first component on the host system. A second set of code instructions is emulated to generate a second set of emulated instructions that emulate a second component of the target system on the host system. The first set is executed based on a first clock (which may be a fixed clock) and the second set is executed based on a second clock (which may be a variable clock). The host system adjusts the first or second clock, execution of the first or second sets of instructions or a memory access to maintain a desired synchronization between the first and second sets of instructions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.