System and method for multiple-phase clock generation
US8237485B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 31, 2010 |
| Grant date | Aug 7, 2012 |
| Priority date | — |
| Expiry date | Dec 15, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K23/50
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A system and method of clock generation to provide divided-by-2 clocks with prescribed phase shifts are disclosed. In a communication system with high-order harmonic mixing, the system requires LO signals with a set of prescribed phase shifts, such as 0°, 45°, 90°, and 135°, or 0°, 60° and 120°. Often, the clock generation system involves a divide-by-2 divider to derive the clock signals with the prescribed phase shifts. In a conventional implementation of the divide-by-2 divider, the system is subject to phase uncertainty in the output signal. Accordingly, a system comprises multiple latch pairs and respective differential clocks are used to generate the clocks with the set of correct prescribed phase shifts.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.