Patent · US Active

Vertex cache map mode for per-vertex state changes

US8237725B1 · kind B1 · utility

6Cited by
11References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 5, 2007
Grant dateAug 7, 2012
Priority date
Expiry dateJun 24, 2030

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06T2210/52
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A vertex cache within a graphics processor is configured to operate as a conventional round-robin streaming cache when per-vertex state changes are not used and is configured to operate as a random access storage buffer when per-vertex state changes are used. Batches of vertices that define primitives and state changes are output to parallel processing units for processing according to vertex shader program. In addition to allowing per-vertex state changes, the vertex cache is configured to store vertices for primitive topologies that use anchor points, such as triangle strips, line loops, and polygons.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.