Patent · US Active

Using storage cells to perform computation

US8238173B2 · kind B2 · utility

444Cited by

2References

6Claims

0Family size

Assignee

Zikbit Ltd. · IL

Inventors

Avidan Akerib · Nes Ziona, IL
Oren Agam · Jerusalem, IL
Eli Ehrman · Bet Shemesh, IL
Moshe Meyassed · Even Yehuda, IL

Key dates

Filing date	Jul 16, 2009
Grant date	Aug 7, 2012
Priority date	—
Expiry date	Jan 30, 2030

Classification

Technology area (CPC G)Physics
CPC primaryG11C15/043
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

An in-memory processor includes a memory array which stores data and an activation unit to activate at least two cells in a column of the memory array at generally the same time thereby to generate a Boolean function output of the data of the at least two cells. Another embodiment shows a content addressable memory (CAM) unit without any in-cell comparator circuitry.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.