Patent · US Active

System and method for maintaining the security of memory contents and computer architecture employing the same

US8239663B2 · kind B2 · utility

0Cited by
2References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 30, 2009
Grant dateAug 7, 2012
Priority date
Expiry dateNov 1, 2030

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F12/1416
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A secure memory system and a method of maintaining the security of memory contents. One embodiment of the system includes: (1) a security control module configured to transmit a system memory secure mode signal and processor secure mode signal to place the system in a secure mode, (2) a secure memory bridge coupled to the security control and system memory and configured to encrypt and decrypt data associated with the system memory based on a state of the system memory secure mode signal and (3) a boot processor coupled to the security control module and the secure memory bridge and configured to transmit requests to the secure memory bridge in the secure mode and an unsecure mode.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.