Direct digital synthesizer for reference frequency generation
US8242850B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 21, 2010 |
| Grant date | Aug 14, 2012 |
| Priority date | — |
| Expiry date | May 21, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L1/027
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A direct digital frequency synthesizer having a multi-modulus divider, a numerically controlled oscillator and a programmable delay generator. The multi-modulus divider receives an input clock having an input pulse frequency fosc and outputs some integer fraction of those pulses at an instantaneous frequency fVp that is some integer fraction (1/P) of the input frequency. The multi-modulus divider selects between at least two ratios of P (1/P or 1/P+1) in response to a signal from the numerically controlled oscillator. The numerically controlled oscillator receives an accumulator increment (i.e., the number of divided pulse edges) required before an overflow occurs that causes the multi-modulus divider to change divider ratios in response to an overflow. The numerically controlled oscillator also outputs both the overflow signal and a delay signal to the delay generator. The delay signal contains phase-dithering noise that is induced by input from a pseudo-random noise generator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.