Non-volatile memory cell with metal capacitor
US8243510B2 · kind B2 · utility
3Cited by
10References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 30, 2006 |
| Grant date | Aug 14, 2012 |
| Priority date | — |
| Expiry date | May 24, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2216/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to one exemplary embodiment, a memory cell in a semiconductor chip includes a non-volatile memory transistor, a control gate, and a floating gate. The control gate is capacitively coupled to the floating gate of the non-volatile memory transistor by a metal capacitor. The metal capacitor can be formed in one or more metal levels and in one embodiment is in a shape of a comb with multiple fingers. In one embodiment, the non-volatile memory transistor is an NMOS non-volatile memory transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.