Formal verification of models using concurrent model-reduction and model-checking
US8244516B2 · kind B2 · utility
7Cited by
8References
14Claims
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Key dates
| Filing date | Jun 30, 2008 |
| Grant date | Aug 14, 2012 |
| Priority date | — |
| Expiry date | Jun 15, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N5/01
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Formal verification of models using concurrent model-reduction and model-checking. For example, a system for formal verification of models includes: one or more model reducers to reduce a model; one or more model checkers to check the model, wherein at least one of the model reducers is to run concurrently with at least one of the model checkers; and a model synchronizer to synchronize information between at least one of the model reducers and at least one of the model checkers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.