Upgraded codeword lock state machine
US8245095B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 12, 2009 |
| Grant date | Aug 14, 2012 |
| Priority date | — |
| Expiry date | Jun 1, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/0045
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An apparatus comprising a Forward Error Correction (FEC) processor coupled to an optical receiver, wherein the FEC processor is configured to compare a plurality of received blocks to a plurality of FEC codeword blocks comprising a plurality of parity blocks, and upon detecting a misaligned block in the received blocks, compare at least some of the remaining received blocks to the parity blocks. Also included is an apparatus comprising at least one component configured to implement a method comprising receiving a plurality of blocks, wherein the quantity of received blocks is equal to a quantity of blocks in a FEC codeword, selecting one of the received blocks, determining whether the selected block is aligned with the FEC codeword, and determining whether the remaining blocks correspond to the FEC codeword when the selected block is not aligned with the FEC codeword.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.