Patent · US Active

Selectively strengthening and weakening check-node messages in error-correction decoders

US8245098B2 · kind B2 · utility

8Cited by
17References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 11, 2009
Grant dateAug 14, 2012
Priority date
Expiry dateDec 28, 2030

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03M13/09
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

In one embodiment, an LDPC decoder has a plurality of check-node units (CNUs) and a controller. Initially, the CNUs generate check-node messages based on an initial offset value selected by the controller. If the decoder converges on a trapping set, then the controller selects new offset values for missatisfied check nodes (MSCs), the locations of which are approximated, and/or unsatisfied check nodes (USCs). In particular, offset values are selected such that (i) the messages corresponding to the MSCs are decreased relative to the messages that would be generated using the initial offset value and/or (ii) the messages corresponding to the USCs are increased relative to the messages that would be generated using the initial offset value. Decoding is then continued for a specified number of iterations to break the trapping set. In other embodiments, the controller selects scaling factors rather than, or in addition to, offset values.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.