Method and apparatus for preventing phase interpolation circuit from glitch during clock switching
US8248138B2 · kind B2 · utility
17Cited by
0References
14Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 9, 2010 |
| Grant date | Aug 21, 2012 |
| Priority date | — |
| Expiry date | Jul 20, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2005/00052
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a method and an apparatus, during a phase switching process, for choosing all of outputted phases upon the clock phases devoid of phase switching so as to avoid glitches during clock switching. Compared with the conventional approach for removing glitches by controlling a clock switching sequence, an improvement of a phase rotator is further disclosed in the present invention, which eliminates the glitches of the outputted phase clock so as to realize a glitch-less phase switching in a phase interpolation circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.