Scanning circuit and scanning method for keyboard
US8248276B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jun 17, 2010 |
| Grant date | Aug 21, 2012 |
| Priority date | — |
| Expiry date | Apr 8, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M11/20
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A scanning circuit includes n rows L1˜Ln, 2n columns P1-1˜P1-n and P2-1˜P2-n, and the n rows L1˜Ln and the n columns P1-1˜P1-n cooperatively form a switch matrix comprising n*n switches S1-1˜Sn-n, with ends of the switches in the same row electrically connected to one of n I/O ports K1˜Kn, respectively, the ends of the switches in the same column are electrically connected to ground via one resistor R1-1˜R1-n, respectively, each of resistors R2-1˜R2-n is electronically connected in one column of the columns P2-1˜P2-n, and connected between one of the I/O ports K1˜Kn and ground via one of the resistors R1-1˜R1-n, respectively. A keyboard and a scanning method are also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.