Semiconductor package and method of manufacturing the same
US8248803B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 31, 2010 |
| Grant date | Aug 21, 2012 |
| Priority date | — |
| Expiry date | Oct 13, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/8581
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The subject invention relates to a semiconductor package and method of manufacturing the same. The semiconductor package of the subject invention comprises a substrate with a through hole penetrating therethrough; a semiconductor chip positioned on the substrate covering the through hole; and a thermal conductive device filling the through hole and contacting the semiconductor chip. According to the subject invention, the thermal resistance in the structure of the semiconductor package is substantially reduced and thus desirable performance of heat spreading or dissipation is achieved. In addition, the production cost and size of the semiconductor package are also reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.