Multi-rank memory module that emulates a memory module having a different number of ranks
US8250295B2 · kind B2 · utility
44Cited by
138References
8Claims
0Family size
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Key dates
| Filing date | Jan 5, 2004 |
| Grant date | Aug 21, 2012 |
| Priority date | — |
| Expiry date | Oct 30, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/222
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A transparent four rank memory module has a front side and a back side. The front side has a third memory rank stacked on a first memory rank. The back side has a fourth memory rank stacked on a second memory rank. An emulator coupled to the memory module activates and controls one individual memory rank from either the first memory rank, the second memory rank, the third memory rank, or the fourth memory rank based on the signals received from a memory controller.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.