Topology surveying a series of capacitors
US8253424B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 11, 2009 |
| Grant date | Aug 28, 2012 |
| Priority date | — |
| Expiry date | Aug 10, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02H7/16
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A topology for surveying the integrity of a plurality of capacitors connected in series between a pair of bus lines arranged to be connected to a DC-power source comprises a plurality of resistors connected in series between the pair of bus lines, the plurality of resistors being connected in parallel to the plurality of capacitors; and a comparator comparing the electric potential of an intermediate point between two capacitors of the plurality of capacitors with the electric potential of an intermediate point between two resistors of the plurality of resistors. The comparator provides a signal signaling a difference between these two electric potentials, which indicates a loss of integrity of one capacitor of the plurality of capacitors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.