Apparatus and a method for performing a fractional bit en- and decoding
US8253606B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 20, 2010 |
| Grant date | Aug 28, 2012 |
| Priority date | — |
| Expiry date | Feb 24, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/004
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The invention relates to a fractional bit encoder (1) and a method for encoding a data stream into code word identifiers for a physical line encoder (13), wherein said fractional bit encoder (1) comprises a (1:K) demultiplexer (3) for a de-multiplexing a received data stream into a predetermined number (K) of bit streams, a first (K1:n) multiplexer (4) for re-multiplexing a first number (K1) of said K bit streams onto n parallel lines transporting n re-multiplexed bit streams and a second multiplexer (5) re-multiplexing a second number (K2) of said K bit streams (K2:1) onto a single line transporting one further re-multiplexed bit stream, wherein n=[ld(M)] and M being a configurable number of different code word identifiers, a class detector (7) which evaluates the first n re-multiplexed bit streams to determine a class of the respective bit combination and a word encoder (10) which encodes the respective bit combination depending on the determined class of the bit combination.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.