Organic electronic memory component, memory component arrangement and method for operating an organic electronic memory component
US8254165B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 17, 2008 |
| Grant date | Aug 28, 2012 |
| Priority date | — |
| Expiry date | Jan 19, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K85/6572
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The invention relates to an organic electronic memory component having an electrode and a counterelectrode and an organic layer arrangement formed between said electrode and counterelectrode and in electrical contact herewith, wherein the organic layer arrangement comprises the following organic layers: an electrode-specific charge carrier transport layer and a counterelectrode-specific charge carrier-blocking layer and disposed between said electrode-specific charge carrier transport layer and counterelectrode-specific charge carrier-blocking layer a memory layer region having a charge carrier-storing layer and a further charge carrier-storing layer between which charge carrier-storing layer and a further charge carrier-storing layer is disposed a charge carrier barrier layer. Furthermore the invention relates to a method for the operating of an organic electronic memory component.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.