Nonvolatile memory device and programming method
US8254181B2 · kind B2 · utility
86Cited by
2References
9Claims
0Family size
Assignee
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Key dates
| Filing date | Oct 19, 2009 |
| Grant date | Aug 28, 2012 |
| Priority date | — |
| Expiry date | Oct 28, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/344
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A nonvolatile memory device includes; a memory cell array configured into a plurality of memory blocks, a decoder connected to the plurality of memory blocks via a word line, a page buffer connected to the plurality of memory blocks via a bit line, and control logic configured to define a control voltage applied to at least one of the word line and the bit line during a program/verify operation in accordance with a location of each one of the plurality of memory blocks within the memory cell array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.