Control apparatus and control method
US8255769B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jan 6, 2010 |
| Grant date | Aug 28, 2012 |
| Priority date | — |
| Expiry date | Nov 7, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/09
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A failure is detected immediately and certainly, and continuation of processing in an unstable state is prevented. A first error detection code is generated from first information which is output as a result of execution of a predetermined program conducted by a first processor. A second error detection code is generated from second information which is output as a result of execution of the program conducted by a second processor which is configured so as to output the same computation result as that of the first processor. It is detected whether the first information is the same as the second information, and it is detected whether the first error detection code is the same as the second error detection code. Writing the first information or the second information into a main memory is controlled on the basis of a result of the detection.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.