Selecting formats for multi-format instructions in binary translation of code from a hybrid source instruction set architecture to a unitary target instruction set architecture
US8255882B2 · kind B2 · utility
15Cited by
9References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 30, 2004 |
| Grant date | Aug 28, 2012 |
| Priority date | — |
| Expiry date | Oct 28, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/45516
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method, according to one aspect, may include estimating costs associated with translating a multi-format instruction of a source instruction set architecture to instructions of a target instruction set architecture by using a different format of the multi-format instruction for each of the costs, and selecting a format for the multiformat instruction based at least in part on the estimated costs. Methods of organizing or grouping multi-format instructions based on register use relationships. Software, hardware, and computer systems to implement the methods are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.