Method and apparatus for clock generator lock detector
US8258831B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 5, 2010 |
| Grant date | Sep 4, 2012 |
| Priority date | — |
| Expiry date | Oct 1, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/095
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A clock generator is disclosed that includes a lock detector. The lock detector is configured to generate a lock signal based on control signals of a phase lock loop circuit that generates an output clock of a desired frequency that is phase locked to a reference clock. The lock detector generates a mismatch signal based on a comparison between the phases of the reference clock and the output clock to generate a compare result. The lock detector delays the compare result by a time period Td and AND the delayed compare result with the compare result to generate the mismatch signal. The lock detector includes a lock-counter that counts a number of reference clock cycles when the mismatch signal remains at 0. The lock signal indicates that a lock-state is achieved when the number of counted reference clock cycles equals a set-value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.