Flash memory system operating in a random access mode
US8259501B2 · kind B2 · utility
2Cited by
4References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 13, 2011 |
| Grant date | Sep 4, 2012 |
| Priority date | — |
| Expiry date | Mar 3, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0483
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory system includes a memory and a memory controller operating to control the memory. The memory includes a random accessible memory including a memory cell array operable in a random access mode, a NAND flash memory, and a selection circuit making the memory controller operate either one of the random accessible memory or the NAND flash memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.