System and method of prebias for rapid power amplifier response correction
US8260224B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 2, 2009 |
| Grant date | Sep 4, 2012 |
| Priority date | — |
| Expiry date | May 3, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/447
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A system and method are provided for reducing dynamic EVM of an integrated circuit power amplifier (PA) used for RF communication. In a multistage PA, the largest amplification stage is biased with a high amplitude current pulse upon receipt of a Tx enable, before receipt of the RF signal data burst. The high amplitude current pulse causes a large portion of the total ICQ budget of the multistage PA to pass through the largest amplification stage causing the entire integrated circuit to rapidly approach steady-state operating conditions. A smoothing bias current is applied to the largest amplification stage after the pulse decays to compensate for transient bias current levels while standard bias circuitry is still approaching steady-state temperature.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.