Acquisition circuit comprising a buffer capacitor
US8263925B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 1, 2010 |
| Grant date | Sep 11, 2012 |
| Priority date | — |
| Expiry date | Apr 11, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/78
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The acquisition circuit comprises a second and third electronic switch connected in series between a photodetector and a first input terminal of an amplifier. A reference voltage is applied to a second input terminal of the amplifier, the reference voltage being applied between the photodetector and the second electronic switch by means of a fourth electronic switch. An integration capacitor and a first electronic switch are connected in parallel between the first input terminal and an output terminal of the amplifier. A buffer capacitor is connected between a common terminal of the second and third electronic switches and a secondary voltage. The electrical capacitance of the buffer capacitor is at least equal to that of the integration capacitor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.