Semiconductor memory device
US8264018B2 · kind B2 · utility
6Cited by
4References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 11, 2010 |
| Grant date | Sep 11, 2012 |
| Priority date | — |
| Expiry date | Mar 16, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/10
Abstract
Provided is a semiconductor memory device. The semiconductor memory device may include a local bitline extending in a direction substantially vertical to an upper surface of a semiconductor substrate and a local wordline intersecting the local bitline. The local bitline is electrically connected to a bitline channel pillar penetrating a gate of a bitline transistor, and the local wordline is electrically connected to a wordline channel pillar penetrating a gate of a wordline transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.