Printed non-volatile memory
US8264027B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 12, 2010 |
| Grant date | Sep 11, 2012 |
| Priority date | — |
| Expiry date | Oct 6, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/0241
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A nonvolatile memory cell is disclosed, having first and second semiconductor islands at the same horizontal level and spaced a predetermined distance apart, the first semiconductor island providing a control gate and the second semiconductor island providing source and drain terminals; a gate dielectric layer on at least part of the first semiconductor island; a tunneling dielectric layer on at least part of the second semiconductor island; a floating gate on at least part of the gate dielectric layer and the tunneling dielectric layer; and a metal layer in electrical contact with the control gate and the source and drain terminals. In one advantageous embodiment, the nonvolatile memory cell may be manufactured using an “all-printed” process technology.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.