Load driving circuit
US8264280B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 7, 2009 |
| Grant date | Sep 11, 2012 |
| Priority date | — |
| Expiry date | Oct 19, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02H7/0844
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Detection accuracy of a short circuit state in a load driving circuit is improved thereby operation efficiency of a motor may be enhanced. A gate control circuit 25 turns off NMOS transistors Q1 and Q4, turns on an NMOS transistor Q3, and turns on and off an NMOS transistor Q2 intermittently so as to control rotation of a motor 10. A detection circuit 30a detects a voltage Va at a connection node a between the NMOS transistor Q2 and the motor 10 a predetermined time after the NMOS transistor Q2 is turned on. A control circuit 20 turns off the NMOS transistor Q2 so as to cut off a current from a power supply to the motor 10 if the voltage Va at the connection node a is within a range in which the motor 10 is determined to be short-circuited.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.