Data flow control within and between DMA channels
US8266338B2 · kind B2 · utility
5Cited by
20References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 19, 2011 |
| Grant date | Sep 11, 2012 |
| Priority date | — |
| Expiry date | Oct 19, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one embodiment, a direct memory access (DMA) controller comprises a transmit circuit and a data flow control circuit coupled to the transmit circuit. The transmit circuit is configured to perform DMA transfers, each DMA transfer described by a DMA descriptor stored in a data structure in memory. There is a data structure for each DMA channel that is in use. The data flow control circuit is configured to control the transmit circuit's processing of DMA descriptors for each DMA channel responsive to data flow control data in the DMA descriptors in the corresponding data structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.