Cache miss processing using a defer/replay mechanism
US8266383B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 30, 2009 |
| Grant date | Sep 11, 2012 |
| Priority date | — |
| Expiry date | Oct 28, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/084
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
One embodiment of the present invention sets forth a technique for processing cache misses resulting from a request received from one of the multiple clients of an L1 cache. The L1 cache services multiple clients with diverse latency and bandwidth requirements, including at least one client whose requests cannot be stalled. The L1 cache includes storage to buffer pending requests for caches misses. When an entry is available to store a pending request, a request causing a cache miss is accepted. When the data for a read request becomes available, the cache instructs the client to resubmit the read request to receive the data. When an entry is not available to store a pending request, a request causing a cache miss is deferred and the cache provides the client with status information that is used to determine when the request should be resubmitted.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.