Methods for forming metal gate transistors
US8268085B2 · kind B2 · utility
2Cited by
2References
17Claims
0Family size
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Key dates
| Filing date | Mar 8, 2010 |
| Grant date | Sep 18, 2012 |
| Priority date | — |
| Expiry date | Sep 3, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/691
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for cleaning a diffusion barrier over a gate dielectric of a metal-gate transistor over a substrate is provided. The method includes cleaning the diffusion barrier with a first solution including at least one surfactant. The amount of the surfactant of the first solution is about a critical micelle concentration (CMC) or more. The diffusion barrier is cleaned with a second solution. The second solution has a physical force to remove particles over the diffusion barrier. The second solution is substantially free from interacting with the diffusion barrier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.