Using pattern generators to control flow of data to and from a semiconductor device under test
US8269520B2 · kind B2 · utility
8Cited by
1References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 8, 2009 |
| Grant date | Sep 18, 2012 |
| Priority date | — |
| Expiry date | Oct 22, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31908
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A semiconductor device tester includes programmable hardware configured to test a semiconductor device under test. The programmable hardware is programmed with two or more pattern generators to control a flow of data to and from the semiconductor device under test.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.