Method for the rapid synchronisation of a device for receiving scrambled data, using an optimised calculation of a synchronisation value
US8270551B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 10, 2005 |
| Grant date | Sep 18, 2012 |
| Priority date | — |
| Expiry date | Dec 27, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B2201/70707
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
The disclosure relates to a method of synchronising a device for receiving scrambled data, using at least one periodic scrambling sequence which is divided into K time intervals, each interval comprising N bit periods known as symbols. In particular, one such method includes calculating a synchronisation value of at least one polynomial that generates the aforementioned scrambling sequence within a pre-determined synchronisation time interval and synchronisation bit period. During the calculation step, the sequence is progressed through at increments of at least one time interval and at least one bit period, using a matrix calculation of the synchronisation value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.