Methods of forming a pattern and methods of fabricating a semiconductor device having a pattern
US8273668B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jul 30, 2010 |
| Grant date | Sep 25, 2012 |
| Priority date | — |
| Expiry date | Dec 9, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/32139
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods of forming a pattern and methods of fabricating a semiconductor device having a pattern are provided, the methods include forming a self-assembly induction layer including a first region and a second region on a semiconductor substrate. A block copolymer layer is coated on the self-assembly induction layer. A first pattern, a second pattern and a third pattern are formed by phase separating the block copolymer. At least one of the first, second and third patterns may be removed to form a preliminary pattern. An etching process may be performed using the preliminary pattern as an etching mask. The first pattern contains the same material as that of the second pattern, and the third pattern contains a material different from that of the first pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.