Semiconductor integrated circuit device and method of fabricating the same

US8274068B2 · kind B2 · utility

Assignee

• Kabushiki Kaisha Toshiba · JP

Inventor

• Hiroyuki Nagashima · Yokohama, JP

Key dates

• Filing date: Mar 19, 2010
• Grant date: Sep 25, 2012
• Expiry date: Sep 10, 2030

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10N70/8833

Abstract

A semiconductor integrated circuit device including: multiple wiring layers stacked on a semiconductor substrate with interlayer insulating films interposed therebetween; wiring hook-up portions extended from the corresponding wirings in the respective wiring layers; and contact conductors so buried in interlayer insulating films as to pass through the hook-up portions for vertically leading wirings of the respective wiring layers, wherein the hook-up portions have different sizes from each other between at least two layers in the wiring layers.