CMOS image sensor with heat management structures
US8274101B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 9, 2010 |
| Grant date | Sep 25, 2012 |
| Priority date | — |
| Expiry date | Feb 3, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/807
Abstract
An image sensor includes a device wafer substrate of a device wafer, a device layer of the device wafer, and optionally a heat control structure and/or a heat sink. The device layer is disposed on a frontside of the device wafer substrate and includes a plurality of photosensitive elements disposed within a pixel array region and peripheral circuitry disposed within a peripheral circuits region. The photosensitive elements are sensitive to light incident on a backside of the device wafer substrate. The heat control structure is disposed within the device wafer substrate and thermally isolates the pixel array region from the peripheral circuits region to reduce heat transfer between the peripheral circuits region and the pixel array region. The heat sink conducts heat away from the device layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.