Wafer and test method thereof
US8274302B2 · kind B2 · utility
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7Claims
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Key dates
| Filing date | Oct 30, 2009 |
| Grant date | Sep 25, 2012 |
| Priority date | — |
| Expiry date | Jun 24, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2884
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A wafer and a test method thereof are provided. The invention utilizes a first group of probes to perform a high voltage stress (HVS) test on a first chip, and utilizes a second group of probes to perform a function test on a second chip, where a period of the high voltage stress test overlaps a period of the function test, thereby greatly decreasing the test time of the wafer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.