Nonvolatile semiconductor memory device
US8274815B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 21, 2010 |
| Grant date | Sep 25, 2012 |
| Priority date | — |
| Expiry date | Jan 20, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/72
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A nonvolatile semiconductor memory device in accordance with an embodiment comprises a plurality of first, second lines, a plurality of memory cells, and a control circuit. The plurality of second lines extend so as to intersect the first lines. The plurality of memory cells are disposed at intersections of the first, second lines, and each includes a variable resistor. The control circuit is configured to control a voltage applied to the memory cells. The control circuit applies a first pulse voltage to the variable resistor during a forming operation. In addition, the control circuit applies a second pulse voltage to the variable resistor during a setting operation, the second pulse voltage having a polarity opposite to the first pulse voltage. Furthermore, the control circuit applies a third pulse voltage to the variable resistor during a resetting operation, the third pulse voltage having a polarity identical to the first pulse voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.