Self-supporting simplex packets
US8275080B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 7, 2007 |
| Grant date | Sep 25, 2012 |
| Priority date | — |
| Expiry date | Jul 2, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/0079
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
Existing message fields and/or message parameters are configured to facilitate the packet and message synchronization and decoding tasks that conventionally rely upon a known bit sequence in each packet, thereby eliminating the need for a predefined message preamble in each packet. In example embodiments, the unique identifier of each transmitter is structured to facilitate determination of bit polarity and the start of each packet; packet sequence numbers use an unconventional counting sequence to assure synchronizing bit transitions; and so on. Other techniques, such as the use of run-length limited (RLL) message encoding, or 8b/10b encoding, to assure within-packet bit transitions, are also used to enhance clock synchronization and proper header location determination.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.