Patent · US Active

Memory module and method for performing wear-leveling of memory module using remapping, link, and spare area tables

US8275928B2 · kind B2 · utility

10Cited by
5References
18Claims
0Family size

Assignee

Inventor

Key dates

Filing dateMay 15, 2008
Grant dateSep 25, 2012
Priority date
Expiry dateFeb 19, 2031

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F12/0246
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

The invention comprises a memory module capable of wear-leveling. In one embodiment, the memory module comprises a flash memory and a controller. The flash memory comprises a plurality of management units, wherein each of the management units comprises a plurality of blocks. The controller receives new data with a logical address managed by a first management unit selected from the management units, pops a first spare block from a spare area of the first management unit, determines whether an erase count of the first spare block is greater than a first threshold value, searches a second management unit selected from the management units for a replacing block with an erase count lower than a second threshold value when the erase count of the first spare block is greater than the first threshold value, and directs the first management unit and the second management unit to exchange the first spare block with the replacing block.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.