Methods of preparing printed circuit boards and packaging substrates of integrated circuit
US8277668B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 25, 2008 |
| Grant date | Oct 2, 2012 |
| Priority date | — |
| Expiry date | Feb 12, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/1476
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method of forming printed circuit boards and packaging substrates. After blind vias are created in a dielectric layer, a first seed layer is provided in the vias and on the dielectric layer. Copper is applied to fill the vias and to form a copper layer over the vias and over the first seed layer. The first seed layer and the copper layer are removed and a second seed layer is formed on the dielectric layer and the exposed surfaces of the vias. A wire pattern is then formed using a photo-sensitive thin film applied to the second seed layer, and the wires in the wire pattern are thickened. The photo-sensitive thin film and the exposed portions of the second seed layer are removed to form a first conductive pattern of wires. The process may be repeated to form a second conductive pattern of wires on the first pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.