Method for manufacturing semiconductor memory element and sputtering apparatus
US8278212B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 29, 2011 |
| Grant date | Oct 2, 2012 |
| Priority date | — |
| Expiry date | Apr 29, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8828
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
The present invention provides a method for manufacturing a semiconductor memory element including a chalcogenide material layer and an electrode layer, each having an improved adhesion, and a sputtering apparatus thereof. One embodiment of the present invention is the method for manufacturing a semiconductor memory element including: a first step of forming the chalcogenide material layer (113); and a second step of forming a second electrode layer (114b) on the chalcogenide material layer (113) by sputtering through the use of a mixed gas of a reactive gas and an inert gas, while applying a cathode voltage to a target. In the second step, introduction of the reactive gas is carried out at a flow rate ratio included in a hysteresis area (40) appearing in the relationship between a cathode voltage applied to the cathode and the flow rate ratio of the reactive gas in the mixed gas.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.