Patent · US Active

Memory and interconnect design in fine pitch

US8278689B1 · kind B1 · utility

0Cited by

1References

10Claims

0Family size

Assignee

Marvell International Ltd. · BM

Inventors

Qiang Tang · Fremont, US
Min She · Fremont, US
Ken Liao · San Diego, US

Key dates

Filing date	Sep 19, 2011
Grant date	Oct 2, 2012
Priority date	—
Expiry date	Sep 19, 2031

Classification

Technology area (CPC H)Electricity
CPC primaryH10B12/48
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A memory array including a diffusion layer, a poly layer, a metal one layer, a metal two layer, and a contact. The diffusion layer comprises diffusion lines extending in a first direction. The poly layer comprises poly lines extending in the first direction and being arranged on top of and insulated from the diffusion layer. The metal one layer comprises metal one lines extending in the first direction and being arranged on top of and insulated from the poly layer. The metal two layer comprises a metal two line extending in the first direction and being arranged on top of and insulated from the metal one layer. The contact extends through the poly layer, and connects a metal one line to a diffusion line. A poly line further extends in a second direction to bend around the contact such that a predetermined distance separates the poly lines from the contact.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.