High voltage metal-oxide-semiconductor transistor with stable threshold voltage and related manufacturing method
US8278709B2 · kind B2 · utility
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5Claims
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Key dates
| Filing date | Oct 5, 2010 |
| Grant date | Oct 2, 2012 |
| Priority date | — |
| Expiry date | Oct 5, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/601
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A high voltage metal-oxide-semiconductor (HVMOS) transistor includes a gate poly, wherein a channel is formed in an area projected from the gate poly in a thickness direction when the HVMOS is activated; two carrier drain drift regions, adjacent to the area projected from the gate poly, wherein at least one of the carrier drain drift regions has a gradient doping concentration; and two carrier plus regions, respectively locate within the two carrier drain drift regions, wherein the two carrier plus regions and the two carrier drain drift regions are communicating with each other through the channel when the HVMOS is activated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.