Non-volatile semiconductor memory device and method of controlling non-volatile semiconductor memory device
US8279655B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 17, 2010 |
| Grant date | Oct 2, 2012 |
| Priority date | — |
| Expiry date | Jan 2, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/72
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to an embodiment, there are provided a non-volatile semiconductor memory device includes: a memory cell array; a control circuit performing a series of operations to each memory cell and determining, as a defective memory cell, a memory cell whose data retention property does not satisfy a criteria, the series of operations including an operation applying a first bias to the memory cell in a forward direction, and including an operation thereafter applying a second bias to the memory cell in a reverse direction; a storage unit storing an address of the defective memory cell; and an address control unit performing a control to avoid storing data in the defective memory cell whose address is stored in the storage unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.