Method of sharing coarse grained array and processor using the method
US8281107B2 · kind B2 · utility
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2References
25Claims
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Key dates
| Filing date | Feb 18, 2008 |
| Grant date | Oct 2, 2012 |
| Priority date | — |
| Expiry date | Sep 12, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/7867
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of sharing a coarse grained array and a processor using the method is provided. A processor includes a first processor core including a plurality of first functional units which execute a first instruction set, a second processor core including a plurality of second functional units which execute a second instruction set, and a coarse grained array including a plurality of third functional units which execute a portion of instructions of the first instruction set and/or the second instruction set, instead of the first processor core and/or the second processor core.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.