Digital to-analog converter
US8284088B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 2, 2009 |
| Grant date | Oct 9, 2012 |
| Priority date | — |
| Expiry date | Feb 5, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/822
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A complementary pulse width modulation circuit is composed of a signal generating circuit 10 for generating first and second pulse width modulation signals (PWM#1 and PWM#2) that are complementary to each other from an input signal (IN) in response to a sampling synchronous signal (Sample) generated in synchronization with a clock (CLK); and a signal output circuit 20 for combining a positive signal and a negative signal of the first pulse width modulation signal (PWM#1) generated by the signal generating circuit, and for combining the first pulse width modulation signal (PWM#1) combined with the second pulse width modulation signal (PWM#2), followed by outputting.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.