Cyclic digital-to-analog converter (DAC) with capacitor swapping
US8284089B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 9, 2010 |
| Grant date | Oct 9, 2012 |
| Priority date | — |
| Expiry date | Jan 27, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/667
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A cyclic digital-to-analog converter includes a first capacitor and a second capacitor. Switching circuitry is selectively configurable to connect the first and second capacitors is at least two modes of operation, wherein a first mode uses the first capacitor during conversion of a bit as a sampling capacitor and uses the second capacitor during conversion of that bit as a holding capacitor, and wherein a second mode uses the second capacitor during conversion of a bit as a sampling capacitor and uses the first capacitor during conversion of that bit as a holding capacitor. A controller swaps converter operation between the first and second modes based on the bit values of a digital word to be converted. If adjacent bits of the digital word to be converted have different logical values, the converter swaps from the first mode to the second mode (or from the second mode to the first mode). Otherwise, the converted remains in the current first or second mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.