Patent · US Active

Mass storage system with improved usage of buffer capacity

US8285932B2 · kind B2 · utility

1Cited by
2References
8Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 26, 2008
Grant dateOct 9, 2012
Priority date
Expiry dateJun 25, 2029

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F3/0689
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

The present invention relates to a mass storage system with improved usage of buffer capacity, and more specifically to a mass storage system for real-time data storage with an embedded controller. According to the invention, the mass storage system has a first data path between a real-time data interface and a mass storage array, the first data path including a data buffer without access latency, and a second data path between an embedded processor and the mass storage array, wherein the data buffer without access latency is also used as a data buffer for non real-time data transfers between the embedded processor and the mass storage array.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.